Organização de Computadores

Apresentação em tema: "Organização de Computadores"— Transcrição da apresentação:

1 Organização de Computadores
Fabiano Hessel

2 Overheads for Computers as Components
Bibliografia Livro texto Patterson, D. A. & Hennessy, J. L. Organização e projeto de computadores: a interface hardware/software Livros referenciados e outras referências Disponíveis na página da disciplina Slides e documentos disponíveis na página © 2000 Morgan Kaufman Overheads for Computers as Components

3 Overheads for Computers as Components
Conteúdo Revisão de conceitos básicos Processador Cleópatra Características gerais Linguagem assembly Bloco de dados Bloco de controle VHDL © 2000 Morgan Kaufman Overheads for Computers as Components

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Avaliação 2 provas e 1 trabalho prático Fórmula G1 G1= ( P1 + P2 + T ) / 3 P1 - 24/ABRIL P2 - 01/JULHO P4 - 03/JULHO G2 - 08/JULHO © 2000 Morgan Kaufman Overheads for Computers as Components

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Trabalho Implementar o processador R11, utilizando a linguagem VHDL Especificação do trabalho prevista para Maio Apresentação dos trabalhos 24/JULHO 26/JULHO © 2000 Morgan Kaufman Overheads for Computers as Components

6 Overheads for Computers as Components
Aviso Semana Acadêmica Durante a semana acadêmica não haverá aula, estando os alunos e o professor dispensados para acompanhar o evento. Período: 09 a 13 de Junho © 2000 Morgan Kaufman Overheads for Computers as Components

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Embedding a computer output analog input CPU analog mem embedded computer © 2000 Morgan Kaufman Overheads for Computers as Components

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Instruction sets Computer architecture taxonomy. Assembly language. © 2000 Morgan Kaufman Overheads for Computers as Components

9 von Neumann architecture
Memory holds data, instructions. Central processing unit (CPU) fetches instructions from memory. Separate CPU and memory distinguishes programmable computer. CPU registers help out: program counter (PC), instruction register (IR), general-purpose registers, etc. © 2000 Morgan Kaufman Overheads for Computers as Components

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CPU + memory memory address CPU PC 200 data 200 ADD r5,r1,r3 ADD r5,r1,r3 IR © 2000 Morgan Kaufman Overheads for Computers as Components

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Harvard architecture address CPU data memory data PC address program memory data © 2000 Morgan Kaufman Overheads for Computers as Components

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von Neumann vs. Harvard Harvard can’t use self-modifying code. Harvard allows two simultaneous memory fetches. Most DSPs use Harvard architecture for streaming data: greater memory bandwidth; more predictable bandwidth. © 2000 Morgan Kaufman Overheads for Computers as Components

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RISC vs. CISC Complex instruction set computer (CISC): many addressing modes; many operations. Reduced instruction set computer (RISC): load/store; pipelinable instructions. © 2000 Morgan Kaufman Overheads for Computers as Components

14 Instruction set characteristics
Fixed vs. variable length. Addressing modes. Number of operands. Types of operands. © 2000 Morgan Kaufman Overheads for Computers as Components

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Programming model Programming model: registers visible to the programmer. Some registers are not visible (IR). © 2000 Morgan Kaufman Overheads for Computers as Components

16 Multiple implementations
Successful architectures have several implementations: varying clock speeds; different bus widths; different cache sizes; etc. © 2000 Morgan Kaufman Overheads for Computers as Components

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Assembly language One-to-one with instructions (more or less). Basic features: One instruction per line. Labels provide names for addresses (usually in first column). Instructions often start in later columns. Columns run to end of line. © 2000 Morgan Kaufman Overheads for Computers as Components

18 ARM assembly language example
label1 ADR r4,c LDR r0,[r4] ; a comment ADR r4,d LDR r1,[r4] SUB r0,r0,r1 ; comment © 2000 Morgan Kaufman Overheads for Computers as Components

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Pseudo-ops Some assembler directives don’t correspond directly to instructions: Define current address. Reserve storage. Constants. © 2000 Morgan Kaufman Overheads for Computers as Components

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Endianness Relationship between bit and byte/word ordering defines endianness: bit 31 bit 0 bit 0 bit 31 byte 3 byte 2 byte 1 byte 0 byte 0 byte 1 byte 2 byte 3 little-endian big-endian © 2000 Morgan Kaufman Overheads for Computers as Components

21 Example: C assignments (ARM Processor)
x = (a + b) - c; Assembler: ADR r4,a ; get address for a LDR r0,[r4] ; get value of a ADR r4,b ; get address for b, reusing r4 LDR r1,[r4] ; get value of b ADD r3,r0,r1 ; compute a+b ADR r4,c ; get address for c LDR r2,[r4] ; get value of c © 2000 Morgan Kaufman Overheads for Computers as Components

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C assignment, cont’d. SUB r3,r3,r2 ; complete computation of x ADR r4,x ; get address for x STR r3,[r4] ; store value of x © 2000 Morgan Kaufman Overheads for Computers as Components

23 Example: C assignments (SHARC DSP)
x = (a + b) - c; Assembler: R0 = DM(_a) ! Load a R1 = DM(_b); ! Load b R3 = R0 + R1; R2 = DM(_c); ! Load c R3 = R3-R2; DM(_x) = R3; ! Store result in x © 2000 Morgan Kaufman Overheads for Computers as Components